The TPT9L484 is a 3.3V 4-CH Low-Voltage Differential (LVDS) line receivers, which can support 400 Mbps data rates. Receiver inputs are protected against ±8kV ESD strikes without latch-up.

The TPT9L484 can accept low voltage differential input signals as 350 mV typical, and translates them to 3.3V CMOS output levels. The receivers support a Tri-state function that may be used to multi-channel outputs. The receivers also support open, shorted, and terminated (100 Ω) input Fail-safe, with holding output as HIGH level. The device is characterized for operation from –40°C to 85°C. The device is available in 16-lead TSSOP package.

Features

 Exceeds the LVDS Standard TIA/EIA-644 for High speed Data Interchange

 Low-Voltage Differential 100-Ω (typical) Line Receivers for Signaling Rates, Up to 400 Mbps, 200Mbps Clock

 3.3-V Power Supply Design

 6 ns Maximum Propagation Delay

 0.1 ns Differential Skew (Typical)

 Accepts Small Swing (350 mV Typical) VID Supports Open, Short, and Terminated Input Fail-Safe

 Power Down High Impedance on LVDS Inputs

 Bus-Pin Protection: ±8 kV HBM model

 –40°C to 85°C Operation Temperature Range

Applications

 Backplane Multipoint Data/Clock Transmission

 Cellular Base Stations

 Network Switches and Routers

 Industrial Control

 Communication Infrastructure